A Distributed Shared Memory Model and C++ Templated Meta-Programming Interface for the Epiphany RISC Array Processor

摘要

The Adapteva Epiphany many-core architecture comprises a scalable 2D meshNetwork-on-Chip (NoC) of low-power RISC cores with minimal uncorefunctionality. Whereas such a processor offers high computational energyefficiency and parallel scalability, developing effective programming modelsthat address the unique architecture features has presented many challenges. Wepresent here a distributed shared memory (DSM) model supported in softwaretransparently using C++ templated metaprogramming techniques. The approachoffers an extremely simple parallel programming model well suited for thearchitecture. Initial results are presented that demonstrate the approach andprovide insight into the efficiency of the programming model and also theability of the NoC to support a DSM without explicit control over data movementand localization.